Modified : jun. 1st. 2008

LOGICAL GATES
En français
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Description


This module provides very useful boolean logic function such as two logical AND gates that can be combined into a single three inputs AND gate; a logical OR gate and a simple NOT gate.

This utility module is very handy module in order to combine GATE signals to trigger conditional event. For example it can be used to combine the GATE signals from various sequencers.

I designed this module with discrete component only. I could have used CMOS logical ICs but I thought it would be more fun to use transistors and diodes only ! Yes I know I have a weird conception of having fun. Never mind... Anyway, each input is fed to a schmitt trigger. Therefore, one can also input analogue signals instead of pure GATE signal. In such a case, the negative part of the signal is ignored and considered as LOW, and as soon as the signal gets higher than 2V then it is considered as HIGH.
By the way, if you think CMOS ICs are easier or more fun than trannies you can rather build Ken Stone's Quad Logic Module .

Here are the truth tables of this module : for the inputs, low means voltage lower than 2V and high voltage higher than 2V and for the outputs LOW means 0V and HIGH 10V (or 5V depending on the zener option, see notes in the part list)
Logical AND (two inputs) Logical OR
INPUT A
 INPUT B
 OUTPUT
low
 low  LOW
high low LOW
low high LOW
high high HIGH
INPUT A
 INPUT B
 OUTPUT
low low  LOW
high low HIGH
low high HIGH
high high HIGH



Schematic

How it works :
Logical AND sections:
The input signals are applied to Schmitt triggers which convert these signals to proper logical levels (0V or 15V). For the first AND section, Q1-Q2 and Q4-Q5 are connected as classical discrete Schmitt triggers. R2,R3 and R7,R8 are large value resistors that insure high input impedances. Diodes D1 and D3 prevent the input transistors from negative voltages. The logical levels available at the collectors of Q2 and Q5 are applied to D2 and D4 which constitute with R12 (pull-up resistor) the actual logical AND operator. Q3 acts as a buffer and the output signal is available through R17. LD1 show the status of the output. With the values shown on the schematics the logical ON level is 10V. If a 5V level is preferred use the optional zener diode Z1 (5.1V), the PCB is provided with pads for soldering the optional zener.
Logical OR section:
The input signals are applied to Schmitt triggers which convert these signals to proper logical levels (0V or 15V). Transistors Q11-Q12 and Q14-Q15 are connected as classical discrete Schmitt triggers. The logical levels available at the collectors of Q12 and Q15 are applied to D10 and D12 which constitute the actual logical OR operator. Q13 acts as a buffer and the output signal is available through R47. LD3 show the status of the output. With the values shown on the schematics the logical ON level is 10V. If a 5V level is preferred use the optional zener diode Z3 (5.1V), the PCB is provided with pads for soldering the optional zener.

Logical NOT section:
The input signal is applied to a Schmitt trigger which converts the signal to a proper logical level (0V or 15V). Q16-Q17 are connected as a classical discrete Schmitt triggers. Q18 acts as an inverting buffer and the output signal is available through R55.


Printed Circuit Board and Component Layout
PCB design
Layout

Download the schematic as a PDF file 
Download the PCB as a PDF file 

WARNING ! The document is formatted to be printed directly on a mylar for photo-etching or a "press & peel" paper. Make sure that when the printed face of mylar is in contact with the copper side of the PCB, the lettering can be read normally.


Part list and building instructions
reference
 value
 number
Q1.....Q18
 BC547
 18
D1.....D13
 1N4148
 13
Z1....Z3
 optional 5V zener diodes (see text)
 3
R1
 10 ohm 5% 1
R4,R9,R15,R20,R25,R31,R36,R41,R45 220 ohm 5% 9
R50
 330 ohm 5% 1
R17,R33,R47,R55
 1K 5%
 4
R16,R32,R46
 1.5K 5% 3
R13,R29,R44 4.7K 5% 3
R5,R6,R10,R11,R12,R21,R22,R26,R27,R28
R37,R38,R42,R43,R51,R54
 22K 5% 16
R52 47K 5%
 1
R53 100K 5% 1
R14,R30 220K 5% 2
R2,R7,R18,R23,R34,R39,R48 1M 5% 7
R3,R8,R19,R24,R35,R40,R49
 1.2M 5% 7
C2.....C8
 100nF power filtering caps (not shown on schematic)
 7
C1
 22µF/25V electro.
 1
LD1,LD2,LD3
 red LED
 3
Jk1...Jk11
 6.5 mm jack socket
 11

Wiring



Front plate
Panel design

 Download the silkscreen mask as a PDF file 
Download the silkscreen mask as a  JPEG file 



Trimming
This circuit requires no setting or trimming. It must work right away.

The DIY builders' gallery
Here are the photographs of the yusynth LOGICAL modules built by other synth geeks around the world.
Thank you  guys for sending me these nice photos.


 
Name : Frédéric Monti
Pseudo : zarko
 Modular project :
Location : Gardanne, France
Website : 		Name :
Pseudo : sound diver
 Modular project :
Location : UK
Website :


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