Modified : aug. 30th. 2008

Octal Random Gates
En français
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Description

When I designed this module, I had in mind to control a Moog 960 sequencer in a random fashion, but many other applications may be imagined. On the 960 sequencer, a single step can be selected directly by it's  IN jack, that is, instead of having the step sequenced in the logical sequence order you may call every step in an arbitrary order provided that you address directly each step with the  IN jacks. The Octal Random Gate provides eight GATE OUT signals that are randomly sequenced, that is, one out of eight output is active and this randomly changes at every clock pluse. Therefore, at each clock pulse sent to the GATE IN a randomly selected output is set to the ON state while all the other outputs are set to the OFF state.
A toggle switch makes it possible to choose the gating mode between two modes: in the first mode the ON status of the selected output lasts until the next clock pulse; in the second mode, the ON status is gated by the clock pulse, that is it lasts as long as the clock pulse is at the ON status and returns to OFF as soon as the clock signal returns to OFF (see diagram below : output X selected during one clock cycle, output Y selected during two consecutive clock cycles; left GATE MODE OFF, right GATE MODE ON).

Schematic

Basically, the circuit contains three main parts : the clock input built with Q1, the pseudo random sequence generator built with Q2, U1 and U3; and the addressing and output stages built with U2 and Q3 to Q10.
The core of the module is the pseudo-random sequence generator, it is in fact a classical circuit (Elektor) uses to generate digital noise. The CD4006 is an eigtheen stage shift register whose some of its outputs are fedback to its input through XOR gates (CD4070). Q2 inverses one of the output before applying to the XOR gate input in order to avoid an all zero status that would block the generator. The random generator is clocked by an external signal which is buffered by Q1. Three outputs of the CD4006 are connected to the binary addressing pins (A,B,C) of the CD4051 (8 voice analogue multiplexer). The common pin of the CD4051 is connected to the positive rail through a 1K resistor, and all the outputs are connected to an output buffer stage. The GATE MODE switch controls the INHIBIT pin of the CD4051, in the OFF mode the INHIBIT pin is connected to the ground and the active output of the CD4051 remains active. In the ON mode the clock signal is routed to the INHIBIT pin and gates the active output.

NOTE : after powering up, the module needs at least ten clock cycles before it gets into the expected behaviour.

Printed Circuit Board and Component Layout
PCB design
Layout





 Download the schematic as a PDF file 
Download the PCB as a PDF file 

WARNING ! The document is formatted to be printed directly on a mylar for photo-etching or a "press & peel" paper. Make sure that when the printed face of mylar is in contact with the copper side of the PCB, the lettering can be read normally.
IMPORTANT NOTE : Don't forget the four straps. Also because some tracks are quite thin and located very close to each others, check thoroughly the PCB tracks with a looking glass in order to detect the possible copper micro-bridges (ill-etching) and track micro-cuts.
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List of parts and building instructions
reference
 value
 number
U1
 CD4006
 1
U2
 CD4051
 1
U3
 CD4070
 1
Q1,Q2,Q3,Q4,Q5,Q6,Q7,Q8,Q9,Q10
 BC547
 10
D1
 1N4148
 1
R1
 10 ohm
 1
R17,R18,R19,R27,R28,R29,R37,R38,R39
 270 ohm
 8
R8,R10,R12,R14,R16,R18,R20,R22,R24
 1K
 9
R9,R11,R13,R15,R17,R19,R21,R23
 4.7k
 2
R3
 10k
 1
R5,R7 22k
 2
RN2 resistor network 8x1K one common leg
 1
RN1
 resistor network 8x10K one common leg 1
C2,C3,C4 100nF 3
C1 10µF or 22µF/35V electro. 1
Jk1,Jk2,Jk3,Jk4,Jk5,Jk6,Jk7,Jk8,Jk9
 6,5 mm jack socket
 9
J1
 HE10 male socket 2x8 pins
 1

HE10 female connector 2x8 pins
 1

16 lead flat ribon 20cm
 1
SW1
 Push button
 1
SW2
 bipolar switch SPDT
 1

Wiring


Front plate
Panel design


 Download the silkscreen mask as a PDF file 


Download the silkscreen mask as a  JPEG file 



Trimming
This circuit requires no trimming. It must work when powered on.
NOTE : after powering up, the module needs at least ten clock cycles before it gets into the expected behaviour.







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