Update nov. 25th, 2016

Noise generator

Sample & Hold
En français
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Description

This single modules integrates two sub-modules : a noise voltage generator and a sample and hold (S&H) processor.

The noise generator generates three different signals : white noise (evenly distributed frequency spectrum), pink noise (1/f frequency spectrum, that is with a 3dB/octave slope), and a slow varying random voltage (frequency smaller than 6Hz).

The Sample and Hold processor has an internal clock but can be driven from an external clock. The clock rate ranges from 0.1Hz to 100Hz. The clock I/O acts either as an clock input or as a clock output depending on the position of the EXT/INT switch. A yellow LED shows the clock rate. A slew rate is also provided (its behaviour either linear or exponential can be selected with a jumper on the PCB).

As a default, the input of the S&H processor is connected to the white noise source.

I have designed three different PCBs : a PCB that integrates both the noise generator and the S&H  processor, a PCB for the noise generator on its own and a PCB for the S&H processor on its own. Thus one can build the module of one's choice, either combined or separate.

Here are some sound examples :
  • the YUSYNTH VCO frequency is driven by the  RANDOM  output
  • the YUSYNTH VCO frequency is driven by the  S&H  output, the SLEW RATE is also tweaked during the recording
  • PINK NOISE sent to a Lowpass VCF which frequency is driven by the  RANDOM  output, the resonance is tweaked during the recording
    		•

    Schematics

    Separate supply rails are used for the two sub-modules. This was made necessary to solve an issue on my first prototype, the clock and trigger stages of the S&H were interfering with the noise amplifier stage of the noise generator!
    Noise submodule : Q2 is connected as a reverse polarised diode in order to generate as much noise as possible. This noisy signal is first amplified by Q3 and routed both to U3b which amplifies the white noise signal and to Q4. A network or resistor-capacitors (R2-R24,C9-C11) shapes the spectrum. The result is a low-pass filtering with a 3dB/octave slope giving rise to the so-called pink noise.  Then the pink noise is amplified by U3d which is followed by two low-pass filters to provide slow varying random voltages. The first filtering stage is second order low-pass with a cut-off frequency close to 5Hz the second stage provides a 6dB/octave lowpass with a cut-off frequency of 4.7Hz with some amplification in order to level up the random voltage.

    Sample and Hold : U1 is an OPA in a classical astable multivibrator configuration, with the values of R3, R4, R5, C3 and P1 the slowest rate is 0.1Hz and fastest 10Hz. The positive part of the pulse is selected by D1 and routed to a switch that is used to toggle the S&H trigger between the internal clock and an external clock. Q1 drives a LED which flashes as a function of the clock rate. C4 differentiates the clock signal in order to convert the rising edge of the clock into a brief positive pulse (10ms). U2d is connected as a comparator. D2 selects the negative part of the pulse to drive the gate of the Q2 FET.


    Printed circuit boards and component layout

    NOTE : the PCB and a component kit for this module are now made available at  Soundtronics.co.uk

    Mixed PCB design
    Noise+S&H
    Component layout







    		 Download the schematic as a PDF file
    Download the PCB as a PDF file
    Noise Gen. PCB design


    		 Component layout

    		 Download the schematic as a PDF file
    Download the PCB as a PDF file
    S&H PCB design


    		 Component layout

    		 Download the schematic as a PDF file
    Download the PCB as a PDF file
    Note : in the sample and hold submodule, there is a jumper to be installed in order to choose between the linear or the log behaviour.  Don't forget it.

    Components and building details
    Sample and Hold submodule
    reference
    		 value
    		 quantity
    U1
    		 LM741/TL071
    		 1
    U2
    		 TL074
    		 1
    Q1
    		 BC547
    		 1
    Q5
    		 BF245B
    		 1
    D1,D2,D3
    		 1N4148
    		 3
    R1sh,R2sh
    		 10
    		 2
    R10
    		 100
    		 1
    R5,R6,R8,R15
    		 1K
    		 4
    R7,R12
    		 10K
    		 2
    R37
    		 22K
    		 1
    R3,R9,R11,R13
    		 100K
    		 4
    R4
    		 120K
    		 1
    R14
    		 2.2M
    		 1
    C4
    		 1n (any value between 1n and 10n will do)
    		 1
    C5*,C19,C20,C22
    		 100n, * polyester film, ceramic otherwise
    		 4
    C6
    		 680n polyester film 1
    C3
    		 10µF/35V electrolytic
    		 1
    C1sh,C2sh
    		 22µF/35V electrolytic 2
    P1
    		 500K reverse audio potentiometer (ALPHA)
    		 1
    P2
    		 1M log potentiometer
    		 1
    SW
    		 SPDT switch
    		 1
    LED1
    		 Yellow LED
    		 1
    Jk1,Jk5,k6
    		 female jack socket
    		 3
    Noise generator sub-module
    reference
    		 value
    		 quantity
    U3
    		 TL074
    		 1
    Q2*,Q3,Q4
    		 BC547, *selected for maximum noise level and whitest spectrum
    		 3
    R1n,R2n
    		 10
    		 2
    R19
    		 22
    		 1
    R32,R35,R36
    		 1K
    		 3
    R25
    		 3.9K
    		 1
    R26
    		 8.2K
    		 1
    R18,R30
    		 10K
    		 2
    R24
    		 18K
    		 1
    R28,R29,R33
    		 33K
    		 3
    R16
    		 47K
    		 1
    R20
    		 82K
    		 1
    R23
    		 100K
    		 1
    R17
    		 150K
    		 1
    R31
    		 220K
    		 1
    R22
    		 390K
    		 1
    R27,R34
    		 470K
    		 2
    R21
    		 1M
    		 1
    C13,C18
    		 10p ceramic
    		 2
    C11
    		 1n yellow LCC 1
    C10
    		 3.3n yellow LCC 1
    C9
    		 47n yellow LCC 1
    C21
    		 100n ceramic
    		 1
    C16
    		 150n yellow LCC
    		 1
    C14,C15
    		 1µF yellow LCC unpolarized
    		 2
    C12,C17
    		 10µF/25V electrolytic
    		 2
    C7,C8
    		 47µF/25V electrolytic 2
    Jk2,Jk3,Jk4
    		 female jack socket
    		 3
    Wiring


    Front panel
    Panel design


    		 Download the silkscreen mask as a PDF file

    Download the silkscreen mask as a  JPEG file


    Setting and trimming
    The trimming is quite simple, it consists of taking a batch of BC547 transistors and selecting among these which one gives the highest white noise level while being symetrically balanced around 0V level, with the flatest spectrum. In order to do so, it is a good idea to use a transistor socket for Q2, this way one can swap easily the transistors to find the best one. It is a good practice to wait about 1min before checking the noise level and quality of white spectrum in order that Q2 has reached a steady temperature.
    Below are the spectra I measured on the two boards I built. Some resistor values may also be adjusted to obtain the desired output levels.


    Measured audio spectrum - white noise output (0dB position set arbitrarily)


    Measured audio spectrum - pink noise output (0dB position set arbitrarily)

    References
    Here are some interesting references concerning noise generation and noise properties :

    Grant Richter's spectral and probability distributions :
    Eliott sound project :

    The DIY builders' gallery
    Here are the photographs of the yusynth Noise-SH modules built by other synth geeks around the world.
    Thank you  guys for sending me these nice photos.
    Name : Czaba ZVEKAN
    Modular project :
    Location : Basel, Switzerland
    Website :      		Name  : Patrick
    Pseudo : Baronrouge
    Modular project: JHC live lab
    Location     Toulon, France
    Web site : http://myspace.com/patjhc
    Name  : Federic Monti
    Pseudo : Zarko
    Modular project:
    Location     Gardanne, France
    Web site :

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